High speed circuit design---time borrowing and time stealing
نویسنده
چکیده
This paper introduces one of the high speed CMOS clocking design style --time borrowing and time stealing. It starts with an introduction of traditional domino pipeline structure and its limits. In the following parts, time borrowing and time stealing and their usages are introduced respectively.
منابع مشابه
Optimal Clocking and Enhanced Testability for High-Performance Self-Resetting Domino Pipelines
We describe a method to clock the domino pipeline at the maximum rate by using soft synchronizers between pipeline stages and thus allowing “time borrowing,” i.e., allowing input signals to arrive at a pipe stage after the clock tick. We show a robust way of placing “roadblocks” (equivalent to slave latches) in each pipe stage to maintain the optimal clock rate. As explicit latches are not requ...
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